1. Field of the Invention
The present invention relates to a semiconductor memory device which includes a circuit including a semiconductor element such as a transistor.
2. Description of the Related Art
A dynamic random access memory (DRAM) is a semiconductor memory device in which one bit of data can be stored with the use of one transistor and one capacitor. The DRAM has advantages such as a small area per unit memory cell, easiness in integration for modularization, and low manufacturing cost.
A circuit pattern of the DRAM has been miniaturized in accordance with a scaling law in a manner similar to those of other semiconductor integrated circuits. However, when an area occupied by a transistor is reduced, most part of the area of the DRAM is occupied by a capacitor, and it is difficult to reduce the area of the capacitor. This is because the miniaturization increases leakage between a source and a drain of the transistor and thus charge retained in the capacitor is gradually lost. In other words, the capacitor of the DRAM needs such a large capacitance that data is not changed by influence of charge which is lost due to the leakage.
Therefore, the DRAM needs to be charged again (refreshed) before necessary charge is lost. However, when the capacitance of the capacitor is reduced, there is a problem in that the frequency of refresh operations is increased, and as a result, power consumption is increased.
To solve such a problem, a DRAM is disclosed (see Patent Document 1). The DRAM includes a capacitor which has a small area and a large capacitance by forming a storage node electrode so as to pass a protruding end from the inner wall of a cylindrical side wall insulating film formed so as to protrude from a storage node contact.
However, when the DRAM having such a structure is manufactured, difficulty in the process might be increased due to its complicated structure and the yield might be lowered.